Hackaday

Pocket-sized Test Pattern Generator Helps Check Those CRTs

Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based ...
Hackaday

test pattern

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...
Semiconductor Engineering

Reducing Chip Test Costs With AI-Based Pattern Optimization

The old adage “time is money” is highly applicable to the production testing of semiconductor devices. Every second that a wafer or chip is under test means that the next part cannot yet be tested.
EDN

Hierarchical test improves pattern application efficiency

For over 15 years, I've been a big proponent of hierarchical test. Hierarchical test is the commonly used term for creating DFT (design-for-test) features and test patterns at lower level circuit ...
Audioholics

ISF Gives Away 4K Test Patterns to Calibrators

Once unzipped, each pattern is around 24MB. If you're already a member her is a direct link to the 4K ISF Test patterns. The Imaging Science Foundation (ISF) has released some free 4K test patterns ...
Electronic Design

Using Timing Constraints For Generating At-Speed Test Patterns

Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...